In integrated circuits, there is generally a piece of silicon known as a die or chip which contains electrical circuits and which is connected to a lead frame. The chip has bonding pads which are connected to the lead frame by tiny wires. The lead frame has leads which are used for connecting to a printed circuit board as part of a larger system. The leads of the lead frame have a certain amount of inductance as well as capacitance and resistance. There is also some inductance in the wire from the bonding pad to the lead frame. This wire inductance, however, is significantly less than that of the lead frame. The connection of a lead of the lead frame to a circuit board also adds some inductance. As the switching speeds of integrated circuits have increased, this cumulative inductance has begun to have an impact on the performance of the integrated circuit.
Of course it is desirable to have integrated circuits which are very fast. The increased switching speed has also increased the rate at which current changes. This increased rate of current change causes a voltage drop across the inductance. The voltage across an inductance is equal to the inductance times the time rate of change of the current through that inductance. This is expressed as Ldi/dt, where L is the inductance and di/dt is the time rate of change of the current. As the di/dt becomes larger, the voltage across the inductance becomes larger. This voltage drop across an inductance causes a voltage differential between the lead location on the circuit board and the bonding pad to which it is connected on the integrated circuit. This can create a problem of having the internal supply at different voltage than the voltage of the external supply.
The problem is compounded when the output that is being provided is made up of a plurality of signals. Many integrated circuits have an output comprised of a plurality of signals. There are memory circuits which provide 4 bit or 8 bit outputs. When four bits comprise a single output, the output is generally referred to as a nibble. When eight bits comprise the output, the output is generally referred to as a byte. In integrated circuit microprocessors, there are commonly 8 and 16 bit outputs and even 32 bit outputs. Such multiple signal outputs multiply the problem of current change. The most severe problem is when all of the bits change from a logic high to a logic low or from a logic low to a logic high. For the logic low to logic high situation there is a maximum change in current flowing from the positive power supply to the outputs of the various buffers which comprise the output circuit. This then is the case for maximum voltage drop from the positive external power supply to the positive internal power supply. For the logic high to logic low transition there is a maximum change in current flowing from the negative power supply to the internal negative power supply. The negative power supply is often ground in current state of the art integrated circuits. This then is the situation in which the voltage of the internal ground is the highest voltage with respect to the external or system ground. Of course the integrated circuit must be designed to handle the most severe problem. The desired output is also of course not known so the integrated circuit must be designed to handle the case in which all of the signals which comprise the output will change.
If the Ldi/dt voltage drop, caused by the large current change, between the internal and external voltage terminals becomes sufficiently large, the logic state of other inputs to integrated circuit 10 can be misinterpreted. What the external circuit board interprets as a logic low may be interpreted as a logic high by the integrated circuit because the internal power supply voltage is so low. Although this differential between internal and external power supply voltage is only for the duration of the high rate of change of current, this can result in providing an erroneous output in an integrated circuit that is externally clocked or a significant delay in providing a valid output in an integrated circuit that is static.
The same type of situation can occur for the case in which the output buffers begins sinking current. This will have the affect of raising the voltage of the internal ground above that of the circuit board ground. If this voltage differential becomes sufficiently large, then inputs to the integrated circuit may be misinterpreted. A signal which is a logic high with respect to the circuit board which is using the internal ground as the ground reference, may be interpreted by the integrated circuit as a logic low because the internal ground terminal is at too high of a voltage. This is particularly true of TTL input levels which are skewed to the ground side of the power supply.
One conventional solution has been to keep the device sizes of the output buffer sufficiently low so that the output buffer does not cause too large of a current change. This of course is a sacrifice of speed. Another solution has been to add more power supply leads so that the current change is spread over more leads. More leads can viewed as placing inductors in parallel which decreases the inductance. This adds to the cost of the package as well as requiring more space on the circuit board.